Part Number Hot Search : 
P6KE100A MBRF2 SS550 LTC17 1SS32207 GRM21BR ADF41 1413YG
Product Description
Full Text Search
 

To Download KK4093B Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 TECHNICAL DATA
KK4093B
Quad 2-Input NAND Schmitt Triggers
High-Voltage Silicon-Gate CMOS
The KK4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negativegoing signals. The difference between the positive voltage (V+) and the negative voltage (V-) is defined as hysteresis voltage (VH) (see Fig.1). * Operating Voltage Range: 3.0 to 18 V * Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25C * Noise margin (over full package temperature range): 0.5 V min @ 5.0 V supply 1.0 V min @ 10.0 V supply 1.5 V min @ 15.0 V supply
ORDERING INFORMATION KK4093BN Plastic KK4093BD SOIC TA = -55 to 125 C for all packages
LOGIC DIAGRAM PIN ASSIGNMENT
FUNCTION TABLE
Inputs A PIN 14 =VCC PIN 7 = GND L L H H B L H L H Output Y H H H L
L - LOW voltage level H - HIGH voltage level
1
KK4093B
MAXIMUM RATINGS*
Symbol VCC VIN IIN PD Ptot Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +20 -0.5 to VCC +0.5 10 500 500 100 -65 to +150 260
Unit V V mA mW mW C C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/C from 100 to 125C SOIC Package: : - 7 mW/C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
2
KK4093B
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC Symbol VT+min Parameter Minimum PositiveGoing Input Threshold Voltage Test Conditions Input on terminals A or B; other inputs to VCC Input on terminals A and B; other inputs to VCC VT+max Maximum PositiveGoing Input Threshold Voltage Input on terminals A or B; other inputs to VCC Input on terminals A and B; other inputs to VCC VT-min Minimum NegativeGoing Input Threshold Voltage Input on terminals A or B; other inputs to VCC Input on terminals A and B; other inputs to VCC VT-max Maximum NegativeGoing Input Threshold Voltage Input on terminals A or B; other inputs to VCC Input on terminals A and B; other inputs to VCC VHmin Note Minimum Hysteresis Voltage Input on terminals A or B; other inputs to VCC Input on terminals A and B; other inputs to VCC VHmax Note Maximum Hysteresis Voltage Input on terminals A or B; other inputs to VCC Input on terminals A and B; other inputs to VCC IIN Maximum Input Leakage Current VIN= GND or VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 Guaranteed Limit -55C 2.2 4.6 6.8 2.6 5.6 6.3 3.6 7.1 10.8 4 8.2 12.7 0.9 2.5 4 1.4 3.4 4.8 2.8 5.2 7.4 3.2 6.6 9.6 0.3 1.2 1.6 0.3 1.2 1.6 1.6 3.4 5 1.6 3.4 5 0.1 25C 2.2 4.6 6.8 2.6 5.6 6.3 3.6 7.1 10.8 4 8.2 12.7 0.9 2.5 4 1.4 3.4 4.8 2.8 5.2 7.4 3.2 6.6 9.6 0.3 1.2 1.6 0.3 1.2 1.6 1.6 3.4 5 1.6 3.4 5 0.1 125 C 2.2 4.6 6.8 2.6 5.6 6.3 3.6 7.1 10.8 4 8.2 12.7 0.9 2.5 4 1.4 3.4 4.8 2.8 5.2 7.4 3.2 6.6 9.6 0.3 1.2 1.6 0.3 1.2 1.6 1.6 3.4 5 1.6 3.4 5 1.0 A V V V V V Unit V
3
KK4093B
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) - continued
VCC Symbol ICC Parameter Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Test Conditions VIN= GND or VCC V 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 5.0 10 15 5.0 10 15 Guaranteed Limit -55C 1 2 4 20 0.64 1.6 4.2 -2.0 -0.64 -1.6 -4.2 4.95 9.95 14.95 0.05 0.05 0.05 25C 1 2 4 20 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 4.95 9.95 14.95 0.05 0.05 0.05 125 C 30 60 120 600 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 4.95 9.95 14.95 0.05 0.05 0.05 V Unit A
IOL
VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V
mA
IOH
Minimum Output VIN= GND or VCC High (Source) Current UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V Minimum High-Level Output Voltage Maximum Low-Level Output Voltage VIN=GND or VCC
VOH
VOL
VIN= VCC
V
Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min).
AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200k, Input tr=tf=20 ns)
VCC Symbol tPLH, tPHL Parameter Maximum Propagation Delay, Input A or B to Output Y (Figure 2) Maximum Output Transition Time, Any Output (Figure 2) Maximum Input Capacitance V 5.0 10 15 5.0 10 15 380 180 130 200 100 80 Guaranteed Limit -55C 25C 380 180 130 200 100 80 7.5 125C 760 360 260 400 200 160 Unit ns
tTLH, tTHL
ns
CIN
pF
4
KK4093B
a) Definition of VT+, VT-, VH
c) Test setup
b) Transfer characteristic of 1 of 4 gates Figure 1. Hysteresis definition, characteristic, and test setup
Figure 2. Switching Waveforms
EXPANDED LOGIC DIAGRAM (1/4 of the Device)
5
KK4093B
N SUFFIX PLASTIC DIP (MS - 001AA)
A 14 8 B 1 7
Dimension, mm Symbol A B C MIN 18.67 6.1 MAX 19.69 7.11 5.33 0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38 10 3.81 8.26 0.36 0.56 1.78
F
L
D F
C -T- SEATING N G D 0.25 (0.010) M T K
PLANE
G H
H J
M
J K L M N
NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC (MS - 012AB) Dimension, mm
8
A 14
Symbol A
MIN 8.55 3.8 1.35 0.33 0.4 1.27 5.27 0 0.1 0.19 5.8 0.25
MAX 8.75 4 1.75 0.51 1.27
H
B
P
B C
1
G
7 C R x 45
D F G
-TD 0.25 (0.010) M T C M K
SEATING PLANE
H
J F M
J K M P R
8 0.25 0.25 6.2 0.5
NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B 0.25 mm (0.010) per side.
6


▲Up To Search▲   

 
Price & Availability of KK4093B

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X